JD： floorplan，power planning，place&route，cts, timing closure，power analysis，physical verification，ECO；Requirements：公司简介：Founded in 2018, founder has 20 years’ IC industry experience, worked for top IC companies like IBM, AMD, Synopsys, Verisilicon, SYNAPSE and Intel as leader, has long-term, solid and positive relationships with all patterners. And the team members most have 10+ years’ IC design experience, merging with the fastest growing technology both in ASIC and SOC field, patterner including AMD, ADI，GlobalFoundries, HiGon, ZTE，GPT, SYNAPSE，MICROPILOT… Mass production including diverse productions: 7nm/14nm GPU design chip, 28nm high-end graphic chip, 28nm mobile phone chip, 28nm low-power graphic chip, 40nm networking chipset, 55nm mobile chip… we also provide professional, effective and practical consulting service for newly established company.Now we have Beijing, Shanghai, Nanjing, Chengdu sites, to support flexible and high-efficiency working model both for patterner and employee.
成都-武侯区 （成都-武侯区-成都-武侯区） 查看地图
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